HIPEX Full Chip Parasitic Extraction

Contents

  • What is HIPEX?
  • HIPEX Product Family Overview
    • HIPEX Full-Chip Parasitic Extractor Product Design Flow
    • HIPEX Full-Chip Parasitic Extractor Product Family Features
    • HIPEX-NET Device Extraction
    • HIPEX-C Parasitic Capacitance Extraction
    • HIPEX-RC Resistance Extraction
    • HIPEX-RC Supports SPICE and DSPF
    • HIPEX-CRC Network Reduction Tool
  • HIPEX-NET - Layout Device Extractor for HIPEX Products
    • HIPEX-NET Device Recognition
    • MOSFET Transistor Extraction
    • Bipolar Junction Transistor Extraction
    • JFET/MESFET Transistor Extraction
    • Diode Extraction
    • Capacitor Extraction
    • Resistor Extraction
    • Custom Device Extraction
    • Custom Sub-Circuits
    • Net Management
    • Hierarchical Extraction
    • HIPEX Technology File
    • HIPEX-NET Inputs and Outputs
  • HIPEX-C - Capacitance Extractor
    • Parasitic Capacitor Recognition Patterns
    • Multiple Accuracy Modes
    • Selective Extraction
    • Technology and Capacitor Models
    • HIPEX-C Outputs
  • HIPEX-RC - Resistance and Capacitance Extractor
    • Parasitic Capacitor Extraction
    • Parasitic Resistor Extraction
    • Parasitic Resistors Patterns
    • Fragmentation Features for Wires
    • Selective Extraction
    • Connectivity
    • HIPEX-RC Technology Files
    • HIPEX-RC Inputs and Outputs
    • Sample HIPEX-RC Extraction
    • HIPEX-RC Simulation Results
  • HIPEX-CRC - Network Reduction Tool
    • HIPEX-CRC Overview
    • Key Capabilities
    • S-Parameter Based Reduction and Synthesis
    • Realizable Model Reduction
    • HIPEX-CRC Offers Full Set of Reduction Options
    • HIPEX-CRC Flexibility
    • HIPEX-CRC Inputs/Outputs
    • HIPEX-CRC Outputs
    • HIPEX-CRC Precision and Performance
    • Sample test #1

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