Comprehensive MOS Model Validation Environment

Case Study: BSIM3v3

Validating SPICE Models is as important as striving to create an accurate model. With the increasing complexity of models (to cover more physical effects), it is becoming very difficult for a modeling engineer to judge the quality of the model just by simulating several I-V curves. This is especially true for scaleable MOS models intended to cover all geometry and bias ranges. The users of these models (circuit designers) are becoming increasingly suspicious as to the model quality, frequently raising the question as to how the model was validated. The new routine VALIDATE in UTMOSTIII has been developed to allow fast and comprehensive model validation.

Introduction

The VALIDATE routine allows verification of BSIM3 and ALL_DC measurement data against the final DC extracted model. The comparison of the simulated data versus the measured data for the parameters Vsat, Isat and Vth is important for circuit designers. Vsat, Isat and Vth are respectively the saturation drain voltage, saturation drain current and threshold voltage extracted from Ids/Vgs-Vbs and Ids/Vds-Vgs characteristics. Moreover, the extraction is usually done on a set of L-array devices (typically devices with a constant large width and various drawn lengths) and a set of W-array devices (typically devices with a constant large length and various drawn widths). It is very important to verify the model on intermediate geometries as well.

The routine is organized to display different plots very efficiently. The user can use this routine in batch mode or interactively. A new batch command has been introduced to set the values of the fitting variables for this routine.

Fitting Variables

The fitting variables allow the user to set the kind of data that is displayed for each plot and to select the method used for Vth extraction.

Eight different types of curves can be plotted:

Vsat vs Ldrawn for different Vbs sweeps and a constant Vgs
Vsat vs Wdrawn for different Vbs sweeps and a constant Vgs
Isat vs Ldrawn for different Vbs sweeps and a constant Vgs
Isat vs Wdrawn for different Vbs sweeps and a constant Vgs
Vth vs Ldrawn for different Vbs sweeps and a constant Vgs
Vth vs Vds for different devices and a constant Vbs
Vth vs Vbs for different devices and a constant Vds

These variables can take one of 4 possible values:

0: No plot
1: Measurement data only
2: Simulation data only
3: Measurement + Simulation data

Figure 1. Fitting Variable Screen

Extraction Methods

The parameters Vsat, Isat and Vth are extracted using traditional methods. This section describes these methods.

Vsat/Isat extraction

The saturation voltage and the saturation current are extracted from the Ids.Vds-Vbs curves. These parameters are at the coordinates of the intersection point between the slope of the linear region and the minimum slope in the saturation region.

Figure 2. Vsat/Isat extraction example.

Vth Extraction

There are two methods possible for determining the threshold voltage parameter. If the Model(Old=0) fitting variable is set to 0 then the threshold voltage is determined using the maximum slope method. If Model(Old=0) is set to 1 the threshold voltage is calculated as the voltage at which Ids just exceeds Vth_factor * Wdrawn/Ldrawn. Vth_factor can be set by the user on the fitting variable screen, see Figure 1.

Figure 3. Vth extraction example using the maximum slope method.

Reading of the BSIM3 and ALL_DC Measurement Data

The BSIM3 and ALL_DC routines allow the user to measure the Ids/Vds-Vgs and Ids/Vgs-Vbs characteristics for devices with different geometries. The Validate routine selects the appropriate data from these routines in order to extract the parameters Isat, Vsat and Vth.

This section describes data selection for each plot. It is important to note that this routine works only if a data log file containing BSIM3 or ALL_DC measurement is loaded in UTMOST.

It should be noted that this routine does not make any distinction between measurement data collected from several groups of devices. It is recommended not to select Pmos and NMOS devices at the same time even if they are not in the same group.

The log file used to generate all examples in this article is obtained by using the BSIM3 measurement routine and the following devices:

10/10, 10/2, 10/1, 10/0.6, 10/0.5, 10/0.45, 2/10, 0.6/0.5, 0.6/10, 5/5

Isat/Vsat vs Ldrawn Plots

The Validate routine uses the maximum number of devices corresponding to a set of L_array devices ( constant width and various drawn lengths).

Since the BSIM3 routine was used for measurements, two sets of Ids versus Vds curves are available in the log file: one at zero substrate bias and the other at high substrate bias (-3.3V). The Ids vs Vds data sets have been measured with Vds swept between minimum and maximum values of 0.0V and 3.3V respectively. A data sweep represents one Vds voltage sweep measured over a defined Vds range for constant Vgs and Vbs biases. The gate voltage has been stepped in five equal step values between Vth+0.1V and 3.3V.

In this case, UTMOST will extract the Isat and Vsat parameters for each device for the set of L-array devices: 10/10, 10/2, 10/0.6, 10/0.5, 10/0.45at Vgs=5V/Vbs=0V and at Vgs=5V/Vbs=-3.3V.

Figure 4. Vsat versus Ldrawn validation example. Extracted Isats for measured and simulated data are overlayed and rms, average and maximum errors are calculated. Two sets of data correspond to low and high back bias voltages.

Figure 5. Vsat versus Ldrawn validation example. Extracted Vsats for measured and simulated data are overlayed and rms, average and maximum errors are calculated. Two sets of data correspond to low and high back bias voltages.

Isat/Vsat vs Wdrawn Plots

The Validate routine uses the maximum number of devices corresponding to a set of W_array devices (constant length and various drawn widths).

Since the BSIM3 routine was used for measurements, two sets of Ids versus Vds curves are available in the log file: one at zero substrate bias and the other at high substrate bias (-3.3V).

UTMOST will extract the Isat and Vsat parameters for each device of the set of W-array devices: 10/10, 2/10, 0.6/10 at Vgs=5V/Vbs=0V and at Vgs=5V/Vbs=-3.3V.

Figure 6. Isat versus Wdrawn validation example. Extracted Isats for measured and simulated data are overlayed and rms, average and maximum errors are calculated. Two sets of data correspond to low and high back bias voltages.

Vth vs Ldrawn Plots

The Validate routine uses the maximum number of devices corresponding to a set of L_array devices (constant width and various drawn lengths).

Since the BSIM3 routine was used for measurements, two sets of Ids versus Vgs curves are available: one at very low drain bias of 0.1V and the other at high value of drain bias (3.3V). The Ids versus Vgs data sets have been measured with Vgs swept between defined minimum and maximum values, 0.0V and 3.3V respectively. A data sweep represents one Vgs voltage sweep measured over a defined Vgs range for constant Vbs and Vds biases. The bulk voltage has been stepped in six equally spaced values between 0 and -3.3V.

Figure 7. Isat versus Wdrawn validation example. Extracted Vsats for measured and simulated data are overlayed and rms, average and maximum errors are calculated. Two sets of data correspond to low and high back bias voltages.

In this case, UTMOST will extract the threshold voltage for each device for the set of L-array devices: 10/10, 10/2, 10/1, 10/0.6, 10/.05, 10/0.45 at the Vds value of 0.1V and for the 5 first Vbs step values. The number of Vbs values in this case is limited to 5 by the ALL_DC routine.

Figure 8. Vth versus Ldrawn validation example. Five sets of measured and simulated Vth curves correspond to five Vbs steps

Vth vs Wdrawn Plots

The Validate routine uses the maximum number of devices corresponding to a set of W_array devices (constat length and various drawn widths).

UTMOST will extract the threshold voltage for each device in the set of W-array devices: 10/10, 2/10, 0.6/10 for a Vds value of 0.1V and for the five first Vbs step values. The number of Vbs step values in this case is limited to 5 by the ALL_DC routine.

Figure 9. Vth versus Wdrawn validation example. Five sets of measured and simualted Vth curves correspond to five Vbs steps.

Vth vs Vds Plots

The validation of the threshold voltage variations with Vds is typically performed on L_array devices and not on W_array devices. Consequently, on the plot displayed in Figure 10, only L_array devices are used. It is important for analog designs to model Vth dependency on drain voltage (ETA type parameters) as accurately as possible. No commercial model accurately models Vth as a function of Vds. It is up to the modeling engineer to decide when the model is "good enough"

Since the BSIM3 routine was used for measurements, two sets of Ids versus Vgs curves are available in the log file: one set for Vds=0.1V and the other for Vds=3.3V.

UTMOST will extract the threshold voltage Vth at Vbs=0.0V/Vds=0.1V and at Vbs=0.0V/Vds=3.3V for all the selected devices. It is recommended to try both Vth extraction methods: the maximum slope method and the method where Vgs just exceeds the Vth_factor * Wdrawn/Ldrawn.

Figure 10. Vth versus Vds validation example. Only threshold voltage extracted on L array devices is used for display.

Figure 11. Vth versus Vbs validation example. Only threshold voltage extracted on L array devices is used for display

Vth vs Vbs Plots

The validation of the threshold voltage variations with Vbs is typically performed on L_array devices and not on W_array devices. Consequently, on the plot displayed in Figure 11, only L_array devices are used.

Since the BSIM3 routine was used for measurements, two sets of Ids versus Vgs curves are available in the log file: one set for Vds=0.1V and the other for Vds=3.3V.

Simulation

Simulation data can be used for model validation in two different ways.

If measured data is available, simulation data is obtained for the same bias points used to obtain the measurement data, and the two data sets are superimposed on all validation plots.

In a more general case, simulation can be done on an arbitrary set of geometries and bias ranges. Only simulation data is then displayed. This method is used to scan model robustness across all geometries and all possible bias conditions. It is important to note how device geometries are specified and selected: the selected group number must be higher than the maximum group number used for measurements, and each group number must be different for each plot.

Batch Mode Example

New Batch Command

In the current version of UTMOST, it is not possible to set a value for a fitting variable when UTMOST is used in batch mode. A new command fitvar is introduced for this application.

Syntax: fitvar <fitting variable number> <Routine name> = <fitting variable value>

Example

The following is an example of the batch commands used with the log file that will automatically produce all of the above plots.

# **************************** *

# * demo VALIDATE routine *

# **************************** *

# example working on BSIM3 measurement data

batchdir = .

# load a setup file

model ./VALIDATE

# load a log file containing BSIM3 data for PMOS and NMOS devices

init inf = ./validate_bsim3.log

#initialisation of the fitting variables : flags set to 0

fitvar 1 Validate = 0 # isat vs L plot

fitvar 2 Validate = 0 # isat vs W plot

fitvar 3 Validate = 0 # vsat vs L plot

fitvar 4 Validate = 0 # isat vs W plot

fitvar 5 Validate = 0 # vth vs L plot

fitvar 6 Validate = 0 # vth vs W plot

fitvar 7 Validate = 0 # vth vs Vds plot

fitvar 8 Validate = 0 # vth vs vbs plot

fitvar 9 Validate = 0 # selector of the method

for VTH extraction

fitvar 10 Validate = 1e-7 # factor

plotter = yes

define group = 1

deselect Validate devices all

select Validate devices all

# plot of isat vs L for NMOS devices : meas + sim

fitvar 1 Validate = 3

simulate Validate

fitvar 1 Validate = 0

# plot of isat vs W for NMOS devices : meas

fitvar 2 Validate = 1

simulate Validate

fitvar 2 Validate = 0

# plot of Vth vs W for NMOS devices : meas + sim

fitvar 6 Validate = 3

simulate Validate

fitvar 6 Validate = 0

# plot of Vth vs L for NMOS devices : meas + sim

fitvar 5 Validate = 3

simulate Validate

fitvar 5 Validate = 0

fitvar 9 Validate = 1 #vth selector = 1 ( vth is extracted at ids = w/l *factor

deselect Validate devices all

select Validate devices 1 5 9 11 15 19

# plot of Vth vs Vds for NMOS devices : meas + sim

fitvar 7 Validate = 3

simulate Validate

fitvar 7 Validate = 0

select Validate devices 1 5 9

# plot of Vth vs Vbs for NMOS devices : meas + sim

fitvar 8 Validate = 3

simulate Validate

fitvar 8 Validate = 0

quit

Summary

The new VALIDATE routine allows quick MOS model validation against the available measurement data or through simulation. It allows validation of model capability on an arbitrary set of geometries. This routine is a powerful tool for final model validation before model libraries is released. What remains as future development is to insert optimization capabilities in each plot routine (especially Vth vs Ldrawn and Wdrawn), to allow optimization of reverse short channel effects, or depending on application, allow optimization of Vth versus Vbs curves or adjust Isat/Vsat for a particular geometry set.