Physics-Based Parasitic Extraction Software
CLEVER - Custom Cell Parasitic Extraction/Optimization

  • The most accurate fully automated
     
  • Complete parasitic RC extraction tool
     
  • Fully takes account of all processing and photolithography effects
     
  • 100% physics based extraction, not rule based extraction
     
  • Physics based optical solver for photolithography
     
  • Includes de-focus, line pinching and other optical effects
     
  • Includes photoresist development physics for over/under develop effects
     
  • Fully automated 3D builder - no user meshing required
     
  • Complete built-in spice netlist extractor
     
  • Includes intuitive, easy to use layout editor (GDSII)
     
  • Virtual masks created by layer combinations can also be exported and viewed
     
  • Includes powerful 2D and 3D structure viewing tools
     
  • 3D cutlines from all angles can be viewed
     
  • Intuitive structure building commands (e.g. deposit oxide thick=1)
     
  • Parasitic structures can be viewed at all stages of construction
     
  • Ideal for cell layout verification, since full 3D structure can be viewed
     
  • Ideal for cell process AND layout cell optimization
     
  • Automatically creates netlist with distributed resistance and capacitance
     
  • User defined materials for new dielectrics (eg Lok) and conductors
     
  • Automated electrode labeling
     
  • Runs on Linux and Unix platforms
     
  • Internal netlist reduction and coupling possible to HIPEX CRC
     
  • Critical net analysis
     
  • User defined accuracy
     

 

STELLAR - Standard Cell Parasitic Capacitance Extraction

  • Accurate, 100% Physics Based Capacitance Extraction Tool for larger cells
     
  • For users who require highly accurate extraction for larger cells but who are not concerned about process related corner rounding effects
     
  • Creates parasitic capacitance SPICE netlist
     
  • GDSII layout and technology driven structure generation
     
  • Use of variables allows creation of process design of experiments (DOE)
     
  • Intuitive interactive GUI interface
     
  • Includes 3D viewing tool for structure analysis and verification
     
  • Includes Mask Viewer/Editor for GDSII layout formats
     
  • Dual meshing algorithm allows efficient high speed numerics
     
  • Runs on Linux and Unix platforms
     
  • Includes Worksheet and Optimizer tools for data analysis and plotting
     
  • Includes scripting language for results analysis
     
  • Hidden layer capabilities
     
  • Allow merge of vias
     
  • Multi-via pad connectors correctly simulated
     
  • Take into account floating conductors
     
  • Allow to stop and restart the simulation
     

 

QUEST - High Frequency Modeling

  • Accurate physics based extractor: Inductance, Capacitance, Resistance and Capacitive Loss Extraction
     
  • Calculated RLCG values dependent frequency
     
  • Creates an 18 element, frequency independent inductor SPICE model
     
  • Creates a 6 element, frequency dependent inductor SPICE model
     
  • Creates 2 port or Multi-port S-parameter netlists for use in RF Spice
     
  • Creates W-Element Transmission line SPICE models
     
  • Allows analysis of full (RLCG) parasitic coupling effects between lines
     
  • GDSII layout and technology driven structure generation
     
  • Allows creation of square and octagonal inductors
     
  • Multi-via pad connectors correctly simulated
     
  • Merge of vias possible
     
  • Takes account of substrate loss effects.
     
  • Use of variables allows creation of process design of experiments (DoE)
     
  • Allow statistical process variation analysis by using tonyplot in production mode
     
  • Allows creation of analytical models by using the Optimizer tool included
     
  • Intuitive interactive GUI interfac
     
  • Includes 3D viewing tool for structure analysis and verification
     
  • Includes Mask Viewer/Editor for GDSII layout formats
     
  • Dual meshing algorithm allows efficient high speed numerics
     
  • Runs on Linux and Unix platforms
     
  • Take into account floating conductors
     

 

EXACT - Capacitance Rule File Generator

  • 3D field solver calculates interconnect capacitance models to deliver highest accuracy LPE rule files without compromising extraction performance
     
  • Intuitive and user-friendly graphical interface for process layer description and test structure definition for beginner and experienced process technology developers
     
  • Standard mode of operation handles most conventional processes whereas advanced mode can be used for more complex and non-planar process definitions
     
  • Integrated scripting language provides custom LPE rule files for other extraction tools
     
  • Powerful statistical analysis module option available to calculate variations of capacitance using known process margins to account for interconnect process variation
     
  • Powerful 3D solver supports non-planar semiconductor profiles for accurately modeling irregular etch profiles, dual damascene, and low-K dielectrics
     
  • Automatic model / rule file generation for HIPEX, Simucad’s full chip LPE tool
     
  • Automatic input file generation and submission to 3D field solver
     
  • Menu-driven parameterized layout generator for test structure and pattern generation
     
  • Easy LPE rule file generation with LISA scripting language
     
  • Flexible architecture for fitting raw parasitic data into a wide range of custom equations for xCalibre™, Calibre™ xRC™, and Diva/Dracula LPE™
     
  • Process and layout preview
     
  • Batch mode option allows automated characterization runs
     
  • Advanced mode operation gives experienced user access to the more advanced process models
     
  • Ability to perform statistical analysis on capacitance variations
     
  • Easy to understand extracted capacitance tables that facilitate the analysis of the experiment
     
  • Support Multi-processor machines
     
  • Auto selection of 1D/2D/3D modes
     
  • Interconnect parasitic capacitance modeling support for planar and non-planar dielectrics
     
  • Low-K dielectric and copper damascene process
     
  • Conformal dielectrics deposition
     
  • Sub-wavelength lithographic effects due to optical proximity correction (OPC)
     
  • Process variations impact on interconnect capacitance
     
  • Statistical analysis and worst-case parasitic analysis by applying known process margins to extracted data
     
  • Powerful 3D solver supports non-planar semiconductor profiles for accurately modeling irregular etch profiles, dual damascene, and low-K dielectrics
     
  • 3D field solver calibrates interconnect capacitance models to deliver highest accuracy LPE rule files without compromising extraction performance
     
  • Built-in Optimizer enables improved fitting and process optimization
     
  • Ability to simulate dummy metal
     

Rev# 092805_05

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