SmartSpice 90 Day Development Roadmap, June 2009

SmartSpice

• Make SmartSpice API available through JavaScript
• Integrate Sdebug (generic SILVACO debugger) with SmartSpice for debugging of Verilog-A modules and JavaScript scripts
• Improve parser performance and memory usage in -fast mode. Make -fast mode default mode
• Improve integration of AKO, CMA and EAC functionality and eliminate discrepancies in results when different combinations of these approaches are used
• Improve Monte Carlo analysis and distributed parameter modification mechanism to comply with latest TMI specification
• Improve 3-5 times runtime performance of TMI Modeling Interface
• Improve runtime performance of .ALTER (.lib, .del lib statements)

HSPICE Compatibility

• Develop DCMatch Analysis
• Develop ACMatch Analysis
• Develop MOS Reliability Analysis (MOSRA): hot-carrier injection (HCI) analysis
• Develop new statements: .MATERIAL, .SHAPE, .LAYERSTACK, .FSOPTIONS

Spectre Compatibility

• Support non-default directory for PSF files

Reliability

• Enhance BSIM4SRA MOS model reliability

Verilog-A

• New Verilog-A debugger that directly supports Verilog-A parser
• Support for encrypted Verilog-A source files
• Support expression handling in the argument list for derivative operator ddx()
• Enhance parser to support digital constants in analog blocks
• Support parameter array in Laplace transform filters

Generic SILVACO debugger

• Develop debugger breakpoints and watch lists during context switch
• Develop auto-completion during source code editing
• Enhance breakpoints insertion algorithm during script execution

SmartView

• Display of analog and digital data for digital or mixed-signal simulations
• Implement digital-Cartesian cross chart marker
• Display statistical information for plots, simulations, levels, and vectors
• JavaScript integration