

SmartSpice
Circuit Simulator
SILOS-X
Verilog Simulator
Verilog-A
Language for Smartspice
Harmony is a single-kernel analog/mixed-signal circuit simulator that dynamically links in the capabilities of the SmartSpice Circuit Simulator and the SILOS-X Verilog Simulator at run time. Harmony combines accuracy, performance, capacity and flexibility to simulate circuits expressed in Verilog, SPICE, Verilog-A and Verilog-AMS.
Rev 110507_15
More about Harmony:
Development Roadmaps
90 Day | 1 Year | 3 Year
Analog / AMS / RF Manuals
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