PSP
Surface Potential-Based MOSFET Model

The PSP model is a compact MOSFET model which has been jointly developed by Philips Research and Penn State University.

PSP is a surface-potential based MOS Model, containing all relevant physical effects (mobility reduction, velocity saturation, DIBL, gate current, lateral doping gradient effects, STI stress, etc.) necessary to model present-day and deep-submicron bulk CMOS technologies.

PSP model characteristics are:

  • Suitable for digital, analog, and RF
  • Suitable for modern and future deep sub-micron bulk CMOS technologies
  • Physics-based
  • Combine the best features of SP model (Penn State University) and MOS Model 11 (Philips)
  • Number of parameters and simulation time comparable to MOS Model 11
  • Simple parameter extraction
  • The source/drain junction model is an integrated part of the PSP model algorithms
Figure 1: Output characteristics of 0.36/0.09 µm MOS-FET; Vgs varies between 0.5 and 1V, Vsb=0. Circles represent measured data, solid lines correspond to PSP.

 

General Features of PSP Model

Physical surface-potential-based formulation in both intrinsic and extrinsic model modules

Physical and accurate description of the accumulation region

Inclusion of all relevant small-geometry effects

Modeling of the halo implant effects, including the output conductance degradation in long devices

Coulomb scattering and non-universality in the mobility model

Non-singular velocity-field relation enabling the modeling of RF distortions including intermodulation effects

Quantum-mechanical corrections

Correction for the polysilicon depletion effects

GIDL/GISL model

Surface-potential-based noise model including channel thermal noise, flicker noise, and channel-induced gate noise

Advanced junction model including trap-assisted tunneling, band-to-band tunneling and avalanche breakdown

Stress model

 

Figure 2: Gate tunneling current; Vsb=0V, Vds=0.025, 0.042, 0.61and 1V

 

Model Highlights

The PSP model is a symmetrical, surface-potential-based model, giving an accurate physical description of the transition from weak to strong inversion. The PSP model includes an accurate description of all physical effects important for modern and future CMOS technologies, such as:

  • Mobility reduction
  • Bias-dependent series resistance
  • Velocity saturation
  • Conductance effects (CLM, DIBL, etc.)
  • Lateral doping gradient effect
  • Mechanical stress related to STI
  • Accurate and physical gate leakage current
  • Gate-induced drain leakage
  • Output conductance of halo-doped devices
  • Gate depletion
  • Quantum-mechanical effects bias-dependent overlap capacitances
  • Most complete noise model, accurately accounting for velocity saturation and channel-induced gate noise

In addition, PSP gives an accurate description of charges and currents and their first-order derivatives (transconductance, conductance, capacitances), but also of their higher-order derivatives. This yields to an accurate description of MOSFET distortion behaviour, making the PSP model well suited for digital, analog as well as RF circuit design.

 

Figure 3: MOSFET transfer characteristics; Vds=25mV, Vsb=0, 0.2...1.0V

 

Figure 4: Output conductance; Vgs varies between 0.5 and 1V, Vsb = 0

 

Simucad Implementation

  • PSP model is part of SmartLib product-independent models library. It can be accessed within SmartSpice as LEVEL=1000.
  • PSP is compatible with parallel architecture algorithms
  • PSP is compatible with VZERO and BYPASS options in order to achieve greater speed performance.
  • Internal warnings and diagnostics provide valuable information to help identify convergence issues.
  • Usual MOS device variables like currents, conductances, charges and capacitances as well as MOS PSP-specific internal variables can be saved, printed, plotted and/or measured.

 

Figure 5: Measured (symbols) and modelled (lines) input capacitance Cgg as a function of gate bias Vgs for W/L=800µm/90nm n-channel MOSFET; Vds=0, Vsb=0

 

Figure 6: Drain (Sid) and gate (Sig) current noise spectral density versus gate-source bias for an L=90 nm n-channel device. Symbols denote measurements and lines represent modelled results using PSP.

 

Reference: G.Gildenblat et alii. “Introduction to PSP”;
(presented at the 2005 Workshop on Compact modeling in Annaheim CA, May 2005; Technical Proceedings, pp. 19-24)

Rev. 101807_02

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